Chronologic VCS simulator copyright 1991-2020
Contains Synopsys proprietary information.
Compiler version R-2020.12-1_Full64; Runtime version R-2020.12-1_Full64;  Oct 12 01:38 2023
[UART] UART0 is here (stdin/stdout).
C0: reg block 4x5x6, cache block 40x50x60
C0: 191795 minstret
C0: 229531 mcycle
$finish called from file "/proj/users/hanwei.fan/dataset/generated-src/chipyard.harness.TestHarness.Boom64n4n1024n2n4n3n64n2n2n1n8/gen-collateral/TestDriver.v", line 158.
$finish at simulation time           6259215500
           V C S   S i m u l a t i o n   R e p o r t 
Time: 6259215500 ps
CPU Time:   1456.570 seconds;       Data structure size:   3.1Mb
Thu Oct 12 02:03:07 2023
