Chronologic VCS simulator copyright 1991-2020
Contains Synopsys proprietary information.
Compiler version R-2020.12-1_Full64; Runtime version R-2020.12-1_Full64;  Jan 26 22:30 2024
[UART] UART0 is here (stdin/stdout).
mcycle = 1248733
minstret = 1069712
$finish called from file "/rshome/hanwei.fan/chipyard/sims/dse/generated-src/chipyard.harness.TestHarness.Boom32n16n256n2n2n2n128n2n2n1n16/gen-collateral/TestDriver.v", line 158.
$finish at simulation time           3093965500
           V C S   S i m u l a t i o n   R e p o r t 
Time: 3093965500 ps
CPU Time:    817.050 seconds;       Data structure size:   3.2Mb
Fri Jan 26 22:43:41 2024
