Chronologic VCS simulator copyright 1991-2020
Contains Synopsys proprietary information.
Compiler version R-2020.12-1_Full64; Runtime version R-2020.12-1_Full64;  Jan 19 14:52 2024
[UART] UART0 is here (stdin/stdout).
mcycle = 1089216
minstret = 1069712
$finish called from file "/rshome/hanwei.fan/chipyard/sims/dse/generated-src/chipyard.harness.TestHarness.Boom16n4n256n4n2n5n160n2n3n2n16/gen-collateral/TestDriver.v", line 158.
$finish at simulation time           2774185500
           V C S   S i m u l a t i o n   R e p o r t 
Time: 2774185500 ps
CPU Time:   1124.420 seconds;       Data structure size:   3.4Mb
Fri Jan 19 15:11:24 2024
