Chronologic VCS simulator copyright 1991-2020
Contains Synopsys proprietary information.
Compiler version R-2020.12-1_Full64; Runtime version R-2020.12-1_Full64;  Jan 19 18:01 2024
[UART] UART0 is here (stdin/stdout).
mcycle = 1133616
minstret = 604268
$finish called from file "/rshome/hanwei.fan/chipyard/sims/dse/generated-src/chipyard.harness.TestHarness.Boom64n8n512n8n2n2n96n2n2n1n8/gen-collateral/TestDriver.v", line 158.
$finish at simulation time           4573235500
           V C S   S i m u l a t i o n   R e p o r t 
Time: 4573235500 ps
CPU Time:    832.440 seconds;       Data structure size:   3.3Mb
Fri Jan 19 18:15:11 2024
