Chronologic VCS simulator copyright 1991-2020
Contains Synopsys proprietary information.
Compiler version R-2020.12-1_Full64; Runtime version R-2020.12-1_Full64;  Nov 17 03:38 2023
[UART] UART0 is here (stdin/stdout).
mcycle = 141991
minstret = 119202
$finish called from file "/proj/users/hanwei.fan/dataset/generated-src/chipyard.harness.TestHarness.Boom16n2n256n4n4n5n32n1n5n1n8/gen-collateral/TestDriver.v", line 158.
$finish at simulation time           2415205500
           V C S   S i m u l a t i o n   R e p o r t 
Time: 2415205500 ps
CPU Time:    258.100 seconds;       Data structure size:   3.0Mb
Fri Nov 17 03:42:37 2023
